[Linux-Xtensa] Re: Huston We have a Problem - l4x.org shows xtensa not compiling for TWO MONTHS now on kernel.org since you moved the xtensa headers from include/asm-xtensa.

linux-xtensa at linux-xtensa.org linux-xtensa at linux-xtensa.org
Tue Mar 17 01:17:58 PDT 2009

Chris Zankel wrote:
> Piet Delaney wrote:
>>> I was also trying to get OpenEmbedded to compile for Xtensa, but our 
>>> configurability with tar overlay files is not well supported. 
>>> Hopefully, I can get it to compile soon, which would allow me to test 
>>> variations of uClibc, kernel, and compiler more easily.
>> Why do you think OpenEmbedded make that easier than just using a FPGA 
>> board?
> OpenEmbedded is similar to buildroot, so I guess you mean Buildroot and 
> not FPGA? I haven't managed to use CVS and GIT directly in Buildroot. I 
> was hoping that OE makes it easier to test variation of compiler, 
> c-libraries and kernel.
>> I've be stabilizing the SMP kernel, including cache-coherency.
>> It's pretty stable now; runs for LTP for about four days. I hope
>> to have new V3 MMU code also running soon; just waiting for a
>> bit-streams for the lx60 and lx200 that work. I just got the code
>> ready for the SMP V3 MMU bit-stream this evening.
> Is the V3 code in GIT? Is that the change to increate the addressable 
> memory area? Does it involve major code changes?

The V3 MMU option allows the CPU to come up with Virtual == Physical
mapping in the TLB. In the reset vector we currently remap to the V2
mappings but they can be easily changed now to facilitate things like
increasing the kernel address space and using KEXEC with a hot kernel
mapped at another address. We should also be able to run the kernel
un-cached, thought slow, might help resolve cache-alias problems.

I'm preparing my git repository to check in. I just got it working
last week, well actually I'm waiting for a bit-stream to verify
the fix. SMP cache alias kernel has been running LTP now for more than
five days without any issue showing up in the kernel, including no
applications getting paging problems. I am doing extra
cache and TLB flushes and cross calls right now and will remove
them. I wanted to get something rock solid before removing them.
Do you see it being necessary to remove these before going up-steam?
It might take quite a while and I'd like to have something that's
a know solid platform for others to start testing with.

>> What have you been up to at work?
> Lot's of interesting stuff. You will hear about it soon (finally...)
>> Can you tell us where your working at yet?
> Unfortunately, I can still only tell you that I work for Rearden Labs.
>> Dr. Seele is over from Germany this month and I was hopping
>> to arrange for Marc and I to have dinner with him next week
>> if he can make it. His outfit, Emlix, has been working on a
>> uCLinux port to the Stretch SDK which has a Xtensa CPU without
>> an MMU. I thought we should try to keep our work in sync with
>> theirs. If he can make it for dinner before the current plain
>> to get together on April 1 at Tensilica you might want to join
>> Marc and I.
> I would love to. Let me know if and when.

I'll keep ya posted.

> Thanks,
> -Chris

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