[Linux-Xtensa] Re: [RFC 5/6] xtensa: add support for the XTAVNET boards

Max Filippov jcmvbkbc at gmail.com
Tue Nov 6 13:43:18 PST 2012


On Wed, Nov 7, 2012 at 1:08 AM, Marc Gauthier <marc at tensilica.com> wrote:
> Hi Max,
>
> Max Filippov wrote:
>> The Avnet LX60/LX110/LX200 board is an FPGA board that can be
>> configured with an Xtensa processor and an OpenCores Ethernet device.
>
> This same platform now also supports the ML605, which a Xilinx board
> not an Avnet board.  So perhaps the platform can be named more
> generically?  eg. xtboard, or perhaps more specifically xtemul or xtfpga?

Sure.

[...]

>> +/* UART crystal frequency in Hz */
>> +#define DUART16552_XTAL_FREQ (CONFIG_XTENSA_CPU_CLOCK * 1000000)
>
> This requires setting the board frequency in the .config ,
> which is a hassle.  It means the kernel needs to be rebuilt
> whenever resynthesizing the board to a different frequency.
> This had been corrected in the platform port found on:
>
>    git+ssh://git.linux-xtensa.org/git/kernel/linux-2.6.git
>
> in branch marcdev, by reading the correct frequency from
> an FPGA register.  Was there any reason not to include
> that fix?  For example in that branch's setup.c :

No specific reason, will include it (:

>    /* Clock rate varies among FPGA bitstreams; board specific FPGA register
>     * reports the actual clock rate.  */
>    serial_platform_data[0].uartclk = *(long *)XTAVNET_CLKFRQ_VADDR;
>
> Note also, clock resolution in MHz is quite low.
> Bitstreams are often synthesized with non-whole MHz
> frequencies, eg. 41.666666 MHz, 33.333333 MHz, etc.
> So computed divisors may not be optimal.

-- 
Thanks.
-- Max


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